UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 772

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
770
(5) Reception timeout interrupt request signal (INTUBTITO)
(a) Single mode
(b) FIFO mode
Cannot be used.
The reception timeout interrupt request signal is generated if data is stored in receive FIFO when the next
data does not come (start bit is not detected) even after the next data reception wait time specified by the
UBFIC1.UBTC4 to UBFIC1.UBTC0 bits has elapsed, when the timeout counter function is used
(UBFIC1.UBTCE bit = 1).
The reception timeout interrupt request signal is not generated while reception is disabled.
If receive data of the number set as the trigger by the UBFIC2.UBRT3 to UBFIC2.UBRT0 bits is not
received, the timing of reading the number of receive data less than the specified number can be set by
the reception timeout interrupt request signal.
Since the timeout counter starts counting at start bit detection, a receive timeout interrupt request signal
does not occur if data of 1 character has not been received.
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE B (UARTB)
User’s Manual U18279EJ3V0UD

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