UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1038

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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22.1 Overview
22.2 Control Register
1036
• System reset by RESET pin input
• System reset signal (WDTRES) generation by watchdog timer (WDT) overflow
• System reset signal (LVIRES) generation by low-voltage detector (LVI)
• System reset signal (POCRES) generation by power-on-clear circuit (POC)
• Forced reset by on-chip debug function (DCU) and reset mask function (see CHAPTER 26 ON-CHIP DEBUG
(1) Reset source flag register (RESF)
FUNCTION.)
The RESF register is an 8-bit register that indicates occurrence of a reset request from the watchdog timer
(WDT) or low-voltage detector (LVI).
The WDTRF or LVIRF bit of this register is set to 1 when the internal reset source signal from WDT or LVI is
asserted. The WDTRF or LVIRF bit is cleared by a reset signal (the one generated by inputting the RESET pin,
the POCRES signal generated by the power-on-clear circuit (POC), or the forced reset signal generated by the
on-chip debug function), a bit manipulation instruction, or a store instruction (writing 0 to the WDTRF or LVIRF
bit).
The RESF register is a special register and can be written only in a combination of specific sequences (see
3.4.8 Special registers).
This register can be read or written in 8-bit or 1-bit units. However, bits 0 and 4 can only be cleared (0) by
writing.
This register is set to 00H by RESET pin input, a reset by the power-on-clear circuit (POC), or a forced reset by
the on-chip debug function. The reset value differs if the source of reset is other than those sources. For
details on reset conflict, see Cautions on the next page.
CHAPTER 22 RESET FUNCTIONS
User’s Manual U18279EJ3V0UD

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