UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 756

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

754
Remark
For details of parity, see 15.7.6 Parity types and corresponding operation.
•
•
•
Clear the UBTXE and UBRXE bits to 0 before overwriting the UBCL bit.
•
•
UBPS1
UBDIR
UBSL
UBCL
Clear the UBPWR bit or UBTXE and UBRXE bits to 0 before changing the setting
of the UBDIR bit.
Clear the UBTXE and UBRXE bits to 0 before overwriting the UBPS1 and UBPS0
bits.
If “0 parity” is selected for reception, no parity judgment is made. Therefore, no
error interrupt is generated because the UBSTR.UBPE bit is not set to 1.
Clear the UBTXE bit to 0 before overwriting the UBSL bit.
Since reception always operates by using a single stop bit length, the UBSL bit
setting does not affect receive operations.
0
1
0
1
0
0
1
1
0
1
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE B (UARTB)
1 bit
2 bits
MSB transfer first
LSB transfer first
7 bits
8 bits
UBPS0
Specification of data character length of 1-frame transmit/receive data
0
1
0
1
Parity selection during transmission
Specification of transfer direction mode (MSB/LSB)
Do not output a parity bit
Output 0 parity
Output odd parity
Output even parity
Specification of stop bit length of transmit data
User’s Manual U18279EJ3V0UD
Receive with no parity
Receive as 0 parity
Judge as odd parity
Judge as even parity
Parity selection during reception
(2/2)