UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 206

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

204
(4) TAAm I/O control register 1 (TAAmIOC1)
Note V850E/IG3 only
Cautions 1. Rewrite the TAAmIS3 to TAAmIS0 bits when the TAAmCTL0.TAAmCE bit = 0.
The TAAmIOC1 register is an 8-bit register that controls the valid edge for the capture trigger input signals
(TIAm0, TIAm1 pins).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
2. The TAAmIS3 to TAAmIS0 bits are valid only in the free-running timer mode (only when the
V850E/IF3
V850E/IG3
TAAmIOC1
m = 2, 4
m = 2 to 4
(The same value can be written when the TAAmCE bit = 1.) If rewriting was mistakenly
performed, clear the TAAmCE bit to 0 and then set the bits again.
TAAmOPT0.TAAmCCS1 and TAAmOPT0.TAAmCCS0 bits = 11) and the pulse width
measurement mode. In all other modes, a capture operation is not possible.
After reset: 00H
TAAmIS3
TAAmIS1
CHAPTER 6 16-BIT TIMER/EVENT COUNTER AA (TAA)
0
0
1
1
0
0
1
1
7
0
TAAmIS2
TAAmIS0
R/W
0
1
0
1
0
1
0
1
6
0
User’s Manual U18279EJ3V0UD
Address: TAA2IOC1 FFFFF6A3H, TAA3IOC1 FFFFFB03H
No edge detection (capture operation invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
No edge detection (capture operation invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
Capture trigger input signal (TIAm1 pin) valid edge setting
Capture trigger input signal (TIAm0 pin) valid edge setting
5
0
TAA4IOC1 FFFFFB23H
4
0
TAAmIS3 TAAmIS2 TAAmIS1 TAAmIS0
3
2
1
0
Note
,