UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 406

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8.3
404
TMTn includes the following hardware (n = 0, 1).
Notes 1. V850E/IG3 only
Remark
Configuration
2. TIT00/TECR0 and TIT10/TECR1 pins function alternately as capture trigger input pins (TIT00, TIT10),
encoder clear input pins (TECR0, TECR1), and timer output pins (TOT00, TOT10).
TENC00/EVTT0 and TENC10/EVTT1 pins function alternately as encoder input pins (TENC00,
TENC10), external event count input pins (EVTT0, EVTT1), and external trigger input pins (EVTT0,
EVTT1).
TIT01/TENC01 and TIT11/TENC11 pins function alternately as capture trigger input pins (TIT01, TIT11),
encoder input pins (TENC01, TENC11), and timer output pins (TOT01, TOT11).
V850E/IF3: n = 0, 1, m = 1
V850E/IG3: n = 0, 1, m = 0, 1
Timer register
Registers
Timer input
Timer output
Control registers
Item
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
TMTn capture/compare registers 0, 1 (TTnCCR0, TTnCCR1)
16-bit counter × 1
TMTn counter read buffer register (TTnCNT)
TMTm counter write register (TTmTCW)
CCR0 and CCR1 buffer registers
2 in total (TIT00
TENC00
4 in total (TOT00
TMTn control registers 0, 1 (TTnCTL0, TTnCTL1)
TMTm control register 2 (TTmCTL2)
TMTm I/O control registers 0 to 3 (TTmIOC0 to TTmIOC3)
TMTn option register 0 (TTnOPT0)
TMTm option register 1 (TTmOPT1)
TMTm capture input select register (TTISLm)
Table 8-3. Configuration of TMTn
Note 1
User’s Manual U18279EJ3V0UD
, TENC01
Note 1
Note 1
, TIT01
, TOT01
Note 1
, TENC10, TENC11, TECR0
Note 1
Note 1
, TIT10, TIT11, EVTT0
Configuration
, TOT10, TOT11 pins)
Note 1
Note 2
Note 1
, EVTT1,
, TECR1 pins)
Note 2