UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 564

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.4 Operation
10.4.1 System outline
562
(1) Outline of 6-phase PWM output
The 6-phase PWM output mode is used to generate a 6-phase PWM output waveform, by using TABn and the
TABn option in combination.
The 6-phase PWM output mode is enabled by setting the TABnCTL1.TABnMD2 to TABnCTL1.TABnMD0 bits of
TABn to “111”.
One 16-bit counter and four 16-bit compare registers of TABn are used to generate a basic 3-phase wave.
The functions of the compare registers are as follows.
TAAn can perform a tuning operation with TABn to start a conversion trigger source for A/D converters 0 and 1.
Remark
Remark
A dead-time interval is generated from the basic 3-phase wave generated by using three 10-bit dead-time
counters and one compare register to create a wave with a reverse phase to that of the basic 3-phase wave.
Then a 6-phase PWM output waveform (U, U, V, V, W, and W) is generated.
The 16-bit counter for generating the basic 3-phase wave counts up or down. After the operation has been
started, this counter counts up. When its count value matches the cycle set to the TABnCCR0 register, the
counter starts counting down. When the count value matches 0001H, the counter counts up again. This
means that a value two times higher than the value set to the TABnCCR0 register +1 is the carrier cycle.
10-bit dead-time counters 1 to 3 that generate the dead-time interval count up. Therefore, the value set to the
TABn dead-time compare register (TABnDTC) is used as a dead-time value as is. Because three counters are
used, dead time can be generated independently in phases U, V, and W. However, because there is only one
register that specifies a dead-time value (TABnDTC), the same dead-time value is used in the three phases.
TABnCCR0 register
TABnCCR1 register
TABnCCR2 register
TABnCCR3 register
Compare Register
n = 0, 1
m = Set value of TABnCCR0 register
i = Set value of TABnCCR1 register
j = Set value of TABnCCR2 register
k = Set value of TABnCCR3 register
CHAPTER 10 MOTOR CONTROL FUNCTION
Setting of cycle
Specifying output width of phase U
Specifying output width of phase V
Specifying output width of phase W
User’s Manual U18279EJ3V0UD
Function
0002H ≤ m ≤ FFFEH
0000H ≤ i ≤ m + 1
0000H ≤ j ≤ m + 1
0000H ≤ k ≤ m + 1
Settable Range