UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1133

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(1) Output signal timing
(T
V
(2) Reset, external interrupt timing
(T
V
Remarks 1. T
Output rise time
Output fall time
RESET low-level width
RESET high-level width
INTPn low-level width
INTPn high-level width
SS0
SS0
A
A
= −40 to +85°C, V
= −40 to +85°C, V
= V
= V
SS1
SS1
2. After reset release, a 1 ms oscillation stabilization time is internally secured when the oscillation
= EV
Parameter
= EV
Parameter
T
frequency (f
release, an oscillation stabilization time half the value set to the OSTS register is internally secured.
Therefore, T
setting.
os
smp
SS0
SS0
: Oscillation stabilization time
: Noise elimination sampling clock cycle (set by INTNFCn register)
= EV
= EV
DD0
DD0
Output signal
SS1
SS1
= V
= V
X
os
) = 8 MHz. The oscillation stabilization time is therefore (T
= EV
= EV
DD1
DD1
= 0 ns is acceptable if sufficient stabilization time can be secured by the OSTS register
= EV
= EV
SS2
SS2
t
t
t
t
t
t
OR
OF
WRSL
WRSH
WITL
WITH
CHAPTER 28 ELECTRICAL SPECIFICATIONS
= AV
= AV
Symbol
Symbol
DD0
DD0
= EV
= EV
SS0
SS0
<1>
<2>
<3>
<4>
<5>
<6>
= AV
= AV
User’s Manual U18279EJ3V0UD
DD1
DD1
<1>
P07, PDL0 to PDL15, DDO
Other than above
P07, PDL0 to PDL15, DDO
Other than above
Power is on, STOP mode is released
Other than above
n = 00 to 13, 17, 18
(analog noise elimination)
n = 14 to 16 (digital noise elimination)
n = 00 to 13, 17, 18
(analog noise elimination)
n = 14 to 16 (digital noise elimination)
= EV
= EV
SS1
SS1
= AV
= AV
DD2
DD2
= AV
= AV
SS2
SS2
Conditions
Conditions
= 0 V, C
= 0 V, C
DD0
DD0
= AV
= AV
L
L
DD1
DD1
= 50 pF)
= 50 pF)
<2>
= AV
= AV
DD2
DD2
= 4.0 to 5.5 V,
= 4.0 to 5.5 V,
MIN.
500 + T
os
4T
4T
MIN.
500
500
500
500
+ 1) ms. After STOP mode
smp
smp
os
MAX.
MAX.
15
15
8
8
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1131

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