UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 459

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8.6.3
TTmCTL0.TTmCE bit is set to 1. When the valid edge of an external trigger input (EVTTm) is detected, 16-bit
timer/event counter T starts counting, and outputs a PWM waveform from the TOTm1 pin. A PWM waveform with a
duty factor of 50% that has the set value of the TTmCCR0 register + 1 as half its cycle can also be output from the
TOTm0 pin.
EVTTm pin
external event
trigger input/
This mode is valid only in TMT0 (V850E/IG3 only) and TMT1.
In the external trigger pulse output mode, 16-bit timer/event counter T waits for a trigger when the
Pulses can also be output by generating a software trigger instead of using the external trigger.
Notes 1. Because the external trigger input pin (EVTTm) and external event count input pin (EVTTm) share the
Remark
count input)
(external
External trigger pulse output mode (TTmMD3 to TTmMD0 bits = 0010)
Note 1
2. Edge detector for external trigger input.
3. Edge detector for external event count input.
same alternate-function pin, the two functions cannot be used at the same time.
Set by the TTmIOC2.TTmETS1 and TTmIOC2.TTmETS0 bits.
Set by the TTmIOC2.TTmEES1 and TTmIOC2.TTmEES0 bits.
V850E/IF3: m = 1
V850E/IG3: m = 0, 1
Internal count clock
detector
Figure 8-21. Configuration in External Trigger Pulse Output Mode
Edge
Note 3
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
Software trigger
selection
generation
Count
clock
detector
Edge
TTmCE bit
Note 2
User’s Manual U18279EJ3V0UD
control
Count
start
CCR1 buffer register
CCR0 buffer register
TTmCCR1 register
TTmCCR0 register
16-bit counter
Match signal
Match signal
Clear
Transfer
Transfer
S
R
controller
controller
Output
(RS-FF)
Output
INTTTEQCm1 signal
INTTTEQCm0 signal
TOTm1 pin
TOTm0 pin
457

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