UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 810

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
16.1.3 Mode switching between CSIB2 and UARTB
the same time. To use CSIB2 and UARTB, the PMC3, PFC3, and PFCE3 registers must be set in advance.
808
In the V850E/IF3 and V850E/IG3, CSIB2 and UARTB function alternately, and these functions cannot be used at
Caution The operations related to transmission and reception of CSIB2 or UARTB are not guaranteed if
Note
Remark
μ
PD70F3454GC-8EA-A and 70F3454F1-DA9-A only
the mode is switched during transmission or reception. Be sure to disable the unit that is not
used.
× = don’t care
PFCE3
PMC3
PFC3
After reset: 00H
After reset: 00H
After reset: 00H
PFCE37 PFCE36
PMC37
PMC36
PMC35
PMC37
PFC37
Figure 16-3. Mode Switch Settings of CSIB2 and UARTB
7
0
1
1
1
1
0
1
1
1
1
0
1
1
1
1
7
7
CHAPTER 16 CLOCKED SERIAL INTERFACE B (CSIB)
PFCE37
PFCE36
PFCE35
R/W
R/W
PMC36
R/W
PFC36
×
0
0
1
1
×
0
0
1
1
×
0
0
1
1
6
6
6
Address: FFFFF706H
Address: FFFFF446H
Address: FFFFF466H
PFCE35 PFCE34
User’s Manual U18279EJ3V0UD
PFC37
PFC36
PFC35
PMC35
PFC35
×
0
1
0
1
×
0
1
0
1
×
0
1
0
1
5
5
5
PMC34
PFC34
I/O port
SCKB2 I/O
INTP12 input
ASTB
Setting prohibited
I/O port
SOB2 output
TXDB output
Setting prohibited
Setting prohibited
I/O port
SIB2 input
RXDB input
Setting prohibited
Setting prohibited
4
Specification of alternate function of P37 pin
Specification of alternate function of P36 pin
Specification of alternate function of P35 pin
4
4
Note
output
PMC33
PFC33
3
0
3
3
PFCE32 PFCE31
PMC32
PFC32
2
2
2
PMC31
PFC31
1
1
1
PFCE30
PMC30
PFC30
0
0
0

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