UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 464

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

462
<1> Count operation start flow
<2> TTmCCR0 and TTmCCR1 register
setting change flow
(TTmCKS0 to TTmCKS2 bits)
Setting of TTmCCR0 register
Setting of TTmCCR1 register
Remark
Register initial setting
TTmCCR0 register,
TTmCTL1 register,
TTmIOC0 register,
TTmIOC2 register,
TTmCCR1 register
TTmCTL0 register
TTmCE bit = 1
Figure 8-24. Software Processing Flow in External Trigger Pulse Output Mode (2/2)
START
V850E/IF3: m = 1, a = 0, 1
V850E/IG3: m = 0, 1, a = 0, 1
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
Initial setting of these
registers is performed
before setting the
TTmCE bit to 1.
The TTmCKS0 to
TTmCKS2 bits can be
set at the same time
as when counting is
enabled (TTmCE bit = 1).
Trigger wait status.
Writing same value
(same as preset value of
the TTmCCR1 register)
to the TTmCCR1 register
is necessary only when
the set cycle is changed.
When the counter is
cleared after setting,
the value of the TTmCCRa
register is transferred to
the CCRa buffer register.
User’s Manual U18279EJ3V0UD
<3> TTmCCR0, TTmCCR1 register
<4> TTmCCR0, TTmCCR1 register
<5> Count operation stop flow
setting change flow
setting change flow
Setting of TTmCCR1 register
Setting of TTmCCR0 register
Setting of TTmCCR1 register
TTmCE bit = 0
STOP
Counting is stopped.
Only writing of the TTmCCR1
register must be performed when
When the counter is cleared after
setting, the value of the
TTmCCRa register is transferred
to the CCRa buffer register.
When the counter is
cleared after setting,
the value of the TTmCCRa
register is transferred to
the CCRa buffer register.
the set duty factor is changed.