UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 943

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

18.6 Wait Function
18.6.1 Programmable wait function
(1) Data wait control register 0 (DWC0)
Note SRAM read/write cycle
To facilitate interfacing with a low-speed memory or I/O device and creating an interface circuit, it is possible
to insert up to 7 data wait states in the starting bus cycle
The number of wait states can be specified by program using DWC0 register. Just after system reset, all
blocks have 7 data wait states inserted.
This register can be read or written in 16-bit units.
Reset sets this register to 7777H.
Cautions 1. The internal ROM and internal RAM areas are not subject to programmable waits and
2. Write to the DWC0 register after reset, and then do not change the set value. Also,
ordinarily no wait access is carried out.
The on-chip peripheral I/O area is not subject to programmable waits, with wait control
performed by each on-chip peripheral function only.
when changing the initial values of the DWC0 register, do not access an external
memory area until the settings are complete. However, it is possible to access external
memory areas whose initialization settings are complete.
CHAPTER 18 BUS CONTROL FUNCTION
User’s Manual U18279EJ3V0UD
Note
for each CS space.
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