UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 596

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
594
INTTBnCC0
CCR0 buffer
CCR1 buffer
TABnCCR0
TABnCCR1
INTTBnOV
The transfer timing is generated when the crest interrupt occurs, the period of up counting and down counting
changes, and an asymmetrical triangular wave is output.
Remarks 1. This is an example of the operation when the TABnOPT1.TABnICE bit = 1, TABnOPT1.TABnIOE
pin output
Transfer
TOBnT1
register
register
counter
register
register
signal
signal
(b) Rewriting TABnCCR0 register
timing
16-bit
When rewriting the TABnCCR0 register in the intermittent batch mode, the output waveform differs
depending on where the occurrence of the crest or valley interrupt is specified by the interrupt culling
setting. The following figure illustrates the change of the output waveform when interrupts are culled.
L
2.
3. n = 0, 1
0000H
0000H
bit = 0, TABnOPT1.TABnID4 to TABnOPT1.TABnID0 bits = 00001.
: Culled interrupt
Figure 10-32. Rewriting TABnCCR0 Register (When Crest Interrupt Is Set)
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CHAPTER 10 MOTOR CONTROL FUNCTION
User’s Manual U18279EJ3V0UD
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