UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1188

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

D.2 Revision History up to Previous Edition
each edition in which the revision was applied.
1186
2nd edition
The following table shows the revision history up to this edition. The “Applied to:” column indicates the chapters of
Edition
• Addition of product
• Addition of package
• Addition of flash memory programmers
Addition of Note to 1.3.4 Pin configuration (V850E/IG3)
Modification of description in 3.2.2 (2) NMI status saving registers (FEPC, FEPSW)
Modification of Cautions 1 and 2 in Table 4-15 Noise Eliminator (1/2)
Modification of Cautions 1 and 2 in Table 4-15 Noise Eliminator (2/2)
Addition of Note to 4.6 (1) Digital noise elimination 0 control register n (INTNFCn)
Modification of description in 6.6 (1) (a) Counter start operation
Addition of Caution 2 to Figure 6-19 Register Setting for Operation in External Event
Count Mode (2/2)
Modification of description in, addition of Caution to Figure 6-24 Configuration in
External Trigger Pulse Output Mode
Modification of description in Figure 6-26 Setting of Registers in External Trigger
Pulse Output Mode (1/2)
Modification of description in Figure 6-26 Setting of Registers in External Trigger
Pulse Output Mode (2/2)
Modification of description in, addition of Caution to Figure 6-28 Configuration in One-
Shot Pulse Output Mode
Modification of description in Figure 6-30 Setting of Registers in One-Shot Pulse
Output Mode (1/2)
Modification of description in, addition of Caution to Figure 6-30 Setting of Registers in
One-Shot Pulse Output Mode (2/2)
Addition of description to Figure 6-31 Software Processing Flow in One-Shot Pulse
Output Mode
Modification of description in, addition of Caution to Figure 6-42 Configuration in Pulse
Width Measurement Mode
Modification of description in Figure 6-44 Register Setting in Pulse Width
Measurement Mode (1/2)
Modification of description in Figure 6-44 Register Setting in Pulse Width
Measurement Mode (2/2)
Modification of description in Figure 6-45 <1> Count operation start flow
Modification of description in 7.6 (1) (a) Counter start operation
Addition of Caution to Figure 7-26 Register Setting in One-Shot Pulse Output Mode
(3/3)
μ
161-pin plastic FBGA (10 × 10)
PG-FP5 and FL-PR5
PD70F3454F1-DA9-A
APPENDIX D REVISION HISTORY
User’s Manual U18279EJ3V0UD
Description
Throughout
CHAPTER 1
INTRODUCTION
CHAPTER 3
CPU FUNCTION
CHAPTER 4
PORT FUNCTIONS
CHAPTER 6
16-BIT
TIMER/EVENT
COUNTER AA
(TAA)
CHAPTER 7
16-BIT
TIMER/EVENT
COUNTER AB
(TAB)
Applied to:
(1/3)