UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1041

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

clock-through mode. Set the PLL mode by software control (setting PLLCTL.SELPLL bit to 1). To improve noise
immunity, it is recommended to set the PLL mode and then speed up the CPU clock (example: PCC register = 00H
(f
XX
The reset operation by RESET pin input is illustrated below.
The operation after release of reset is the same in both the PLL mode and clock-through mode and is started in the
Caution After release of reset, make sure that the oscillation stabilization time (1.024 ms (at f
Remark
operation)).
RESET (input)
MHz)) and PLL lockup time (1.024 ms (at f
of 1.024 ms is not sufficient to secure stable oscillation, keep the RESET pin low for the
deficient time.
The relationship between f
f
CPU
f
(eliminated as noise)
f
XX
X
Analog delay
Operation at f
Figure 22-1. Reset Operation by RESET Pin Input
Analog delay
XX
XX
CHAPTER 22 RESET FUNCTIONS
and f
User’s Manual U18279EJ3V0UD
X
(eliminated as noise)
in the above timing chart is f
Analog delay
X
= 8 MHz)) elapse. If an oscillation stabilization time
Oscillation stabilization time + PLL lockup time
Analog delay
XX
= 8 × f
X
Operation at f
.
X
/8
X
= 8
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