UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 993

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.2.2 Restore
address of the restored PC.
Execution is restored from non-maskable interrupt servicing by the RETI instruction.
When the RETI instruction is executed, the CPU performs the following processing, and transfers control to the
<1> Loads the restored PC and PSW from FEPC and FEPSW because the PSW.EP bit is 0 and the PSW.NP bit
<2> Transfers control back to the address of the restored PC and PSW.
The following illustrates how the RETI instruction is processed.
Caution When the EP and NP bits are changed by the LDSR instruction during non-maskable
Remark
is 1.
interrupt servicing, in order to restore the PC and PSW correctly during restoring by the RETI
instruction, it is necessary to set EP back to 0 and NP back to 1 using the LDSR instruction
immediately before the RETI instruction.
The solid line shows the CPU processing flow.
CHAPTER 20 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 20-3. RETI Instruction Processing
User’s Manual U18279EJ3V0UD
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