UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 80

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78
Notes 1. This area is access-prohibited. To access the on-chip peripheral I/O, specify addresses FFFF000H
Remarks 1. The arrows indicate the recommended area.
Program space
2. The operation is not guaranteed if an access-prohibited area is accessed.
3.
64 MB
2. This is a recommended memory map for the
to FFFFFFFH.
μ
Others:
PD70F3454GC-8EA-A and 70F3454F1-DA9-A: External memory area
F F F F F F F F H
F F F F F 0 0 0 H
F F F F E F F F H
F F F F C 0 0 0 H
F F F E B F F F H
0 3 F F F F F F H
0 3 F F F 0 0 0 H
0 3 F F E F F F H
0 3 F F C 0 0 0 H
0 3 F F B F F F H
0 0 3 F F F F F H
0 0 0 F F F F F H
0 4 0 0 0 0 0 0 H
0 0 4 0 0 0 0 0 H
0 0 1 0 0 0 0 0 H
0 0 0 4 0 0 0 0 H
0 0 0 3 F F F F H
0 0 0 0 0 0 0 0 H
peripheral I/O
Program space
Figure 3-10. Recommended Memory Map
prohibited
Internal ROM
Internal RAM
area
On-chip
Access
External
memory
Note 3
CHAPTER 3 CPU FUNCTION
User’s Manual U18279EJ3V0UD
Note 2
Note 1
prohibited
peripheral I/O
Internal ROM
Internal RAM
Data space
On-chip
area
Access
External
memory
μ
PD70F3454 (V850E/IG3).
Note 3
Access prohibited area
Note 2
prohibited
Internal ROM
Internal RAM
peripheral I/O
Note 2
area
On-chip
External
memory
Access
Note 3
Note 2
x F F F F F F F H
x F F F F 0 0 0 H
x F F F E F F F H
x F F F C 0 0 0 H
x F F F B F F F H
x 0 4 0 0 0 0 0 H
x 0 3 F F F F F H
x 0 1 0 0 0 0 0 H
x 0 0 F F F F F H
x 0 0 4 0 0 0 0 H
x 0 0 3 F F F F H
x 0 0 0 0 0 0 0 H