UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 872

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

870
(5) IIC function expansion register 0 (IICX0)
(6) IICOPS clock select register (IICOCKS)
This register sets the function expansion of I
This register can be read or written in 8-bit or 1-bit units. The CLX0 bit is set in combination with the
IICCL0.SMC0, IICCL0.CL00, IICOCKS.IICOCKS1, and IICOCKS.IICOCKS0 bits (see 17.4 (7) I
clock setting method).
Set the IICX0 register when the IICC0.IICE0 bit = 0.
Reset sets this register to 00H.
This register controls the division clock of I
This register can be read or written in 8-bit or 1-bit units. The IICOCKS1 and IICOCKS0 bits are set in
combination with the IICCL0.SMC0, IICCL0.CL00, and IICX0.CLX0 bits (see 17.4 (7) I
setting method).
Reset sets this register to 00H.
IICOCKS
IICX0
After reset: 00H
After reset: 00H
IICOCKSEN
IICOCKS1
CLX0
0
1
7
0
0
1
0
0
0
1
1
Communicate at transfer rate set by the IICCL0.CL00 bit.
Communicate at double transfer rate set by the IICCL0.CL00 bit in
high-speed mode .
R/W
R/W
IICOCKS0
I
I
2
2
C division clock operation stop
C division clock operation enable
6
0
0
1
0
1
0
Address: FFFFFD85H
Address: FFFFFD90H
User’s Manual U18279EJ3V0UD
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CHAPTER 17 I
5
0
/4
/6
/8
/10
0
2
Specification of I
C.
2
C (valid only in high-speed mode).
IICOCKSEN
Clock select expansion bit
I
2
4
0
C division clock selection
2
C BUS
2
C division clock operation
3
0
0
2
0
0
IICOCKS1 IICOCKS0
1
0
CLX0
<0>
2
C transfer clock
2
C transfer