UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 974

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
972
Remark
The relationship between the interrupt source and the DMA transfer trigger is as follows (n = 0 to 3).
Cautions 1. DMA transfer starts when an interrupt factor set by the IFCn5 to IFCn0 bits occur. To prevent
IFCn5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2. If the frequency of the CPU clock falls below the clock of each on-chip peripheral I/O because
n = 0 to 3
IFCn4
interrupt servicing from being executed, mask the interrupt by setting the interrupt control
register. DMA transfer starts even if an interrupt is masked.
of the setting of prescaler 2 of the clock generator, the DMA transfer start factor may not be
acknowledged.
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Interrupt source
IFCn3
CHAPTER 19 DMA FUNCTIONS (DMA CONTROLLER)
Other than above
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
Table 19-1. DMA Transfer Start Factors (2/2)
IFCn2
User’s Manual U18279EJ3V0UD
IFCn0 to IFCn5
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
IFCn1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
Internal DMA request signal
IFCn0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
INTUBTIR
INTUBTIT
INTUBTIF
INTUA0R
INTUA0T
INTCB0R
INTCB0T
INTUA1R
INTUA1T
INTCB1R
INTCB1T
INTUA2R
INTUA2T
INTCB2R
INTCB2T
INTIIC
INTAD0
INTAD1
INTAD2
INTTM0EQ0
INTTM1EQ0
INTTM2EQ0
INTTM3EQ0
Setting prohibited
Interrupt Source

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