UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 497

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) Operation timing in free-running timer mode
(a) Interval operation with compare register
When 16-bit timer/event counter T is used as an interval timer with the TTnCCRa register used as a
compare register, software processing is necessary for setting a comparison value to generate the next
interrupt request signal each time the INTTTEQCna signal has been detected.
When performing an interval operation in the free-running timer mode, two intervals can be set with one
channel.
To perform the interval operation, the value of the corresponding TTnCCRa register must be re-set in the
interrupt servicing that is executed when the INTTTEQCna signal is detected.
The set value for re-setting the TTnCCRa register can be calculated by the following expression, where
“D
Remark
INTTTEQCn0 signal
INTTTEQCn1 signal
Compare register default value: D
Value set to compare register second and subsequent time: Previous set value + D
(If the calculation result is greater than FFFFH, subtract 10000H from the result and set this value to the
register.)
a
TTnCCR0 register
TTnCCR1 register
TOTm1 pin output
TOTm0 pin output
” is the interval period.
16-bit counter
TTnCE bit
V850E/IF3: n = 0, 1, m = 1, a = 0, 1
V850E/IG3: n = 0, 1, m = 0, 1, a = 0, 1
FFFFH
0000H
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
Interval period
Interval period
D
(D
(D
00
00
User’s Manual U18279EJ3V0UD
D
10
D
+ 1)
a
10
+ 1)
D
00
− 1
10
Interval period
(10000H +
D
01
Interval period
− D
(10000H +
D
D
D
00
11
)
01
01
− D
D
Interval period
10
D
11
(D
)
11
02
− D
D
Interval period
02
01
D
(10000H +
)
D
02
12
Interval period
− D
(10000H +
D
D
D
11
03
12
)
12
− D
D
03
02
D
)
Interval period
03
(10000H +
D
Interval period
13
(10000H +
D
− D
04
D
− D
12
D
13
)
D
13
03
04
)
D
a
04
D
D
14
05
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