UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 609

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.1 Functions
11.2 Configuration
The watchdog timer has the following functions.
• Reset mode: Reset operation upon overflow of the watchdog timer (generation of WDTRES signal)
• Non-maskable interrupt request mode:
The block diagram of the watchdog timer is shown below.
The watchdog timer consists of the following hardware.
Remark f
Caution The watchdog timer is stopped after reset is released.
enable register (WDTE)
Non-maskable interrupt operation upon overflow of the watchdog timer (generation of INTWDT signal)
Watchdog timer
f
INTWDT:
WDTRES: Reset signal upon overflow of watchdog timer
XX
XX
It starts operating when “ACH” is written to the WDTE register. Also, write to the WDTM
register for verification purposes only once, even if the default settings (reset mode, interval
time: 2
/2
:
10
:
Control registers
26
/f
f
XX
XX
Watchdog timer clock
Peripheral clock
Non-maskable interrupt request signal upon overflow of watchdog timer
Item
/2
) do not need to be changed.
10
CHAPTER 11 WATCHDOG TIMER FUNCTIONS
Figure 11-1. Block Diagram of Watchdog Timer
Watchdog timer mode
register (WDTM)
Table 11-1. Configuration of Watchdog Timer
counter
0
16-bit
Watchdog timer mode register (WDTM)
Watchdog timer enable register (WDTE)
Clear
WDM1 WDM0
f
XX
User’s Manual U18279EJ3V0UD
/2
19
Internal bus
to f
XX
/2
26
0
Selector
0
Configuration
3
WDCS2
WDCS1 WDCS0
controller
Output
2
INTWDT
WDTRES
(internal reset signal)
607