UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 450

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

counts each time the valid edge of external event count input is detected. Additionally, the set value of the TTmCCR0
register is transferred to the CCR0 buffer register.
cleared to 0000H, and a compare match interrupt request signal (INTTTEQCm0) is generated.
detected “value set to TTmCCR0 register + 1” times.
448
When the TTmCE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H. The counter
When the count value of the 16-bit counter matches the value of the CCR0 buffer register, the 16-bit counter is
The INTTTEQCm0 signal is generated each time the valid edge of the external event count input has been
TTmCTL1
TTmIOC2
TTmCTL0
(a) TMTm control register 0 (TTmCTL0)
(b) TMTm control register 1 (TTmCTL1)
(c) TMTm I/O control register 2 (TTmIOC2)
(d) TMTm counter read buffer register (TTmCNT)
(e) TMTm capture/compare register 0 (TTmCCR0)
The count value of the 16-bit counter can be read by reading the TTmCNT register.
If the TTmCCR0 register is set to D
reached (D
TTmCE
Figure 8-16. Register Setting for Operation in External Event Count Mode (1/2)
0/1
0
0
0
+ 1) and the compare match interrupt request signal (INTTTEQCm0) is generated.
TTmEST
0
0
0
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
TTmEEE
0
0
0
User’s Manual U18279EJ3V0UD
0
0
0
0
, the count is cleared when the number of external events has
TTmEES1
TTmMD3
0/1
0
0
TTmEES0 TTmETS1 TTmETS0
TTmCKS2 TTmCKS1 TTmCKS0
TTmMD2
0/1
0
0
TTmMD1 TTmMD0
0
0
0
0
0
1
Select valid edge
of external event
count input (EVTTm pin)
0: Stop counting
1: Enable counting
0, 0, 0, 1:
External event count mode