UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 505

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

later detected, the count value of the 16-bit counter is stored in the TTmCCRa register, the 16-bit counter is cleared to
0000H, and a capture interrupt request signal (INTTTEQCma) is generated.
interrupt request signal (INTTTIOVm) is generated at the next count clock, and the counter is cleared to 0000H and
continues counting. At this time, the overflow flag (TTmOPT0.TTmOVF bit) is also set to 1. Clear the overflow flag to
0 by executing the CLR instruction via software.
Remark
When the TTmCE bit is set to 1, the 16-bit counter starts counting. When the valid edge input to the TITma pin is
The pulse width is calculated as follows.
If the valid edge is not input to the TITma pin even when the 16-bit counter counted up to FFFFH, an overflow
If the overflow flag is set to 1, the pulse width can be calculated as follows.
Remark
Pulse width = Captured value × Count clock cycle
Pulse width = (10000H × TTmOVF bit set (1) count + Captured value) × Count clock cycle
INTTTEQCma signal
TTmCCRa register
INTTTIOVm signal
V850E/IF3: m = 1, a = 0, 1
V850E/IG3: m = 0, 1, a = 0, 1
V850E/IF3: m = 1, a = 0, 1
V850E/IG3: m = 0, 1, a = 0, 1
TITma pin input
16-bit counter
TTmOVF bit
TTmCE bit
FFFFH
0000H
Figure 8-40. Basic Timing in Pulse Width Measurement Mode
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
0000H
User’s Manual U18279EJ3V0UD
D
0
D
1
Cleared to 0 by
CLR instruction
D
2
D
3
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