UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 551

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2) TABn option register 1 (TABnOPT1)
Note When using the crest interrupt (INTTBnCC0 signal) and the valley interrupt (INTTBnOV signal) as the
The TABnOPT1 register is an 8-bit register that controls the interrupt request signal generated by the timer Qn
option function.
The TABnOPT1 register generates the signals output to the interrupt culling circuit, A/D trigger generator 1,
and A/D trigger generator 2 shown in Figure 10-2.
This register can be rewritten when the TABnCTL0.TABnCE bit is 1.
Two rewriting modes (batch write mode and anytime write mode) can be selected, depending on the setting of
the TABnOPT0.TABnCMS bit.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
count signal for interrupt culling or as the A/D trigger signal, set the signal to be used to 1.
An A/D trigger is generated at the culled interrupt timing.
TABnOPT1
(n = 0, 1)
After reset: 00H
TABnID4
TABnICE
TABnIOE
TABnICE
0
0
0
0
1
1
1
1
<7>
:
0
1
0
1
TABnID3
CHAPTER 10 MOTOR CONTROL FUNCTION
TABnIOE
Do not use INTTBnCC0 signal (do not use it as count signal for interrupt
culling).
Use INTTBnCC0 signal (use it as count signal for interrupt culling).
Do not use INTTBnOV signal (do not use it as count signal for interrupt
culling).
Use INTTBnOV signal (use it as count signal for interrupt culling).
0
0
0
0
1
1
1
1
:
R/W
<6>
TABnID2
User’s Manual U18279EJ3V0UD
0
0
0
0
1
1
1
1
:
Address: TAB0OPT1 FFFFF600H, TAB1OPT1 FFFFF640H
Crest interrupt (INTTBnCC0 signal) enable
Valley interrupt (INTTBnOV signal) enable
5
0
TABnID1
0
0
1
1
0
0
1
1
:
TABnID4 TABnID3 TABnID2 TABnID1 TABnID0
4
TABnID0
0
1
0
1
0
1
0
1
:
Not culled (all interrupts are output)
1 masked (one of two interrupts is output)
2 masked (one of three interrupts is output)
3 masked (one of four interrupts is output)
28 masked (one of 29 interrupts is output)
29 masked (one of 30 interrupts is output)
30 masked (one of 31 interrupts is output)
31 masked (one of 32 interrupts is output)
3
Number of times of interrupt
2
:
Note
Note
1
0
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