UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 462

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

460
TTmIOC2
(d) TMTm I/O control register 2 (TTmIOC2)
(e) TMTm counter read buffer register (TTmCNT)
(f) TMTm capture/compare registers 0 and 1 (TTmCCR0 and TTmCCR1)
Note Set the valid edge selection of the unused alternate external input signals to “No edge
The value of the 16-bit counter can be read by reading the TTmCNT register.
If D
PWM waveform are as follows.
Remarks 1. TMTm control register 2 (TTmCTL2), TMTm I/O control register 1 (TTmIOC1), TMTm I/O
Cycle = (D
Active level width = D
0
0
is set to the TTmCCR0 register and D
Figure 8-23. Setting of Registers in External Trigger Pulse Output Mode (2/2)
detection”.
2. V850E/IF3: m = 1
0
0
+ 1) × Count clock cycle
control register 3 (TTmIOC3), TMTm option register 0 (TTmOPT0), TMTm option register
1 (TTmOPT1), TMTm capture input select register (TTISLm), and TMTm counter write
register (TTmTCW) are not used in the external trigger pulse output mode.
V850E/IG3: m = 0, 1
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
0
1
× Count clock cycle
0
User’s Manual U18279EJ3V0UD
TTmEES1
0/1
1
to the TTmCCR1 register, the cycle and active level of the
TTmEES0 TTmETS1 TTmETS0
0/1
0/1
0/1
Select valid edge of external
trigger input (EVTTm pin)
Select valid edge of external
event count input (EVTTm pin)
Note
Note