UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 933

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
18.4 Bus Cycle Type Control Function
directly.
In the
(1) Bus cycle type configuration register 0 (BCT0)
This register can be read or written in 16-bit units.
Reset sets this register to CCCCH.
Cautions 1. Do not access an external memory area until the initial setting of the BCT0 register is
Caution Be sure to set bits 0, 1, 4, 5, 8, 9, 12, and 13 to “0”, and set bits 2, 6, 10, 11, 14, and 15 to
μ
PD70F3454GC-8EA-A and 70F3454F1-DA9-A, SRAM, external ROM, and external I/O can be connected
CSn signal
CSn signal
After reset: CCCCH
2. The set contents of each register are invalid for the CSn space where operations are
“1”. If they are set other than above, the operation is not guaranteed.
BCT0
complete. However, it is possible to access external memory areas whose initialization
settings are complete.
prohibited.
ME1
CS1
MEn
15
1
7
0
1
Operation disabled
Operation enabled
CHAPTER 18 BUS CONTROL FUNCTION
R/W Address: FFFFF480H
14
1
1
6
Memory controller operation enable for each CSn space (n = 0, 1)
User’s Manual U18279EJ3V0UD
13
0
5
0
12
0
0
4
ME0
CS0
11
1
3
10
1
1
2
0
1
0
9
0
0
0
8
931

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