UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 733

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.6.2 UART transmission
by writing transmit data to the UAnTX register. The start bit, parity bit, and stop bit are automatically added.
enabled at the transmit destination.
operation.
UAnTX register to the UARTAn transmit shift register, and thereafter the contents of the UARTAn transmit shift register
are output to the TXDAn pin.
A high level is output to the TXDAn pin by setting the UAnCTL0.UAnPWR bit to 1.
Next, the transmission enabled status is set by setting the UAnCTL0.UAnTXE bit to 1, and transmission is started
Since the CTS (transmit enable signal) input pin is not provided in UARTAn, use a port to check that reception is
The data in the UAnTX register is transferred to the UARTAn transmit shift register upon the start of the transmit
A transmission enable interrupt request signal (INTUAnT) is generated upon end of transmission of the data of the
Write of the next transmit data to the UAnTX register is enabled by generating the INTUAnT signal.
Remarks 1. LSB first
INTUAnT
2. n = 0 to 2
CHAPTER 14 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
Start
bit
D0
Figure 14-6. UART Transmission
D1
User’s Manual U18279EJ3V0UD
D2
D3
D4
D5
D6
D7
Parity
bit
Stop
bit
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