UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 549

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1) TABn dead-time compare register (TABnDTC)
(2) Dead-time counters 1 to 3
The TABnDTC register is a 10-bit compare register that specifies a dead-time value.
Rewriting this register is prohibited when the TABnCTL0.TABnCE bit = 1.
This register can be read or written in 16-bit units.
Reset sets this register to 0000H.
Caution To generate a dead time period, set a value of 1 or greater to the TABnDTC register.
The dead-time counters are 10-bit counters that count dead time.
These counters are cleared or count up at the rising or falling edge of the TOBnm output signal by TABn, and
are cleared and stopped when their count value matches the value of the TABnDTC register. The count clock
of these counters is the same as that set by the TABnCTL0.TABnCKS2 to TABnCTL0.TABnCKS0 bits of TABn.
Remarks 1. The operation differs when the TABnOPT2.TABnDTM bit = 1.
TABnDTC
(n = 0, 1)
After reset: 0000H
2. n = 0, 1, m = 1 to 3
While the operation is stopped (TABnCTL0.TABnCE bit = 0), the dead time period is not
generated and the output levels of the TOBnT1 to TOBnT3 and TOBnB1 to TOBnB3 pins are in
the initial status. To protect the system, therefore, allow the TOBnT1 to TOBnT3 and TOBnB1
to TOBnB3 pins to go into a high-impedance state or select the port mode with setting the
output levels of the pins, before stopping the operation.
If the dead time period is not necessary, set the TABnDTC register to 0.
Automatic dead-time width narrowing function (TABnOPT2.TABnDTM bit = 1).
15
CHAPTER 10 MOTOR CONTROL FUNCTION
000000
R/W
User’s Manual U18279EJ3V0UD
Address: TAB0DTC FFFFF604H, TAB1DTC FFFFF644H
10 9
TABnDTC9 to TABnDTC0
For details, see 10.4.2 (4)
0
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