UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 79

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3.4.6
address generation in operand data accessing of data space. Operand data access from instruction can be directly
executed at the address in this pointer register area ±32 KB. However, because the general-purpose registers that
can be used as a pointer register are limited, by minimizing the deterioration of address calculation performance when
changing the pointer value, the number of usable general-purpose registers for handling variables is maximized, and
the program size can be saved.
The architecture of the V850E/IF3 and V850E/IG3 requires that a register that serves as a pointer be secured for
(1) Program space
(2) Data space
Of the 32 bits of the program counter (PC), the higher 6 bits are fixed to 0, and only the lower 26 bits are valid.
Therefore, a contiguous 64 MB space, starting from address 00000000H, unconditionally corresponds to the
memory map of the program space.
With the V850E/IF3 and V850E/IG3, a 256 MB physical address space is seen as 16 images in the 4 GB CPU
address space. The highest bit (bit 25) of this 26-bit address is assigned as an address sign-extended to 32
bits.
(a) Application examples using wraparound
Recommended use of address space
When R = r0 (zero register) is specified by the LD/ST disp16 [R] instruction, an addressing range of
00000000H ±32 KB can be referenced by the sign-extended disp16.
The zero register (r0) is a register set to 0 by the hardware, and eliminates the need for additional registers
for the pointer.
Example
μ
PD70F3454 (V850E/IG3)
(R = ) 0 0 0 0 0 0 0 0 H
F F F F F 0 0 0 H
F F F F E F F F H
F F F F C 0 0 0 H
F F F F B F F F H
F F F F 8 0 0 0 H
0 0 0 3 F F F F H
0 0 0 0 7 F F F H
CHAPTER 3 CPU FUNCTION
User’s Manual U18279EJ3V0UD
Internal ROM area
On-chip peripheral
Internal RAM area
I/O area
32 KB
4 KB
12 KB
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