UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 769

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(10) UARTB FIFO status register 1 (UBFIS1)
The UBFIS1 register is valid in the FIFO mode (UBFIC0.UBMOD bit = 1). This register can be used to read
the number of empty bytes of transmit FIFO.
This register is read-only in 8-bit units.
Reset sets this register to 10H.
Caution The values of the UBTB4 to UBTB0 bits are reflected after transmit data has been written to
UBFIS1
After reset: 10H
the UBTX register and then time of two cycles of f
exercised when referencing the UBFIS1 register after transmit data has been written to the
UBTX register.
CHAPTER 15 ASYNCHRONOUS SERIAL INTERFACE B (UARTB)
Indicates the number of empty bytes of transmit FIFO (bytes that can be written)
as a transmit FIFO pointer.
UBTB4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
7
0
R
UBTB3
6
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
Setting prohibited
Address: FFFFFA4FH
User’s Manual U18279EJ3V0UD
UBTB2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
5
0
UBTB4
UBTB1
4
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
UBTB0
UBTB3
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
3
XX
UBTB2
0 bytes
1 byte
2 bytes
3 bytes
4 bytes
5 bytes
6 bytes
7 bytes
8 bytes
9 bytes
10 bytes
11 bytes
12 bytes
13 bytes
14 bytes
15 bytes
16 bytes
Invalid
has passed. Therefore, care must be
2
Transmit FIFO pointer
UBTB1
1
UBTB0
0
767

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