UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 298

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
296
(1) 16-bit counter
(2) CCR0 buffer register
(3) CCR1 buffer register
(4) CCR2 buffer register
(5) CCR3 buffer register
(6) Edge detector
(7) Output controller
(8) Selector
This 16-bit counter can count internal clocks or external events.
The count value of this counter can be read by using the TABnCNT register.
When the TABnCTL0.TABnCE bit = 0, the value of the 16-bit counter is FFFFH. If the TABnCNT register is
read at this time, 0000H is read.
Reset sets the TABnCE bit to 0.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TABnCCR0 register is used as a compare register, the value written to the TABnCCR0 register is
transferred to the CCR0 buffer register. When the count value of the 16-bit counter matches the value of the
CCR0 buffer register, a compare match interrupt request signal (INTTBnCC0) is generated.
The CCR0 buffer register cannot be read or written directly.
The CCR0 buffer register is cleared to 0000H after reset, and the TABnCCR0 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TABnCCR1 register is used as a compare register, the value written to the TABnCCR1 register is
transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches the value of the
CCR1 buffer register, a compare match interrupt request signal (INTTBnCC1) is generated.
The CCR1 buffer register cannot be read or written directly.
The CCR1 buffer register is cleared to 0000H after reset, and the TABnCCR1 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TABnCCR2 register is used as a compare register, the value written to the TABnCCR2 register is
transferred to the CCR2 buffer register. When the count value of the 16-bit counter matches the value of the
CCR2 buffer register, a compare match interrupt request signal (INTTBnCC2) is generated.
The CCR2 buffer register cannot be read or written directly.
The CCR2 buffer register is cleared to 0000H after reset, and the TABnCCR2 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TABnCCR3 register is used as a compare register, the value written to the TABnCCR3 register is
transferred to the CCR3 buffer register. When the count value of the 16-bit counter matches the value of the
CCR3 buffer register, a compare match interrupt request signal (INTTBnCC3) is generated.
The CCR3 buffer register cannot be read or written directly.
The CCR3 buffer register is cleared to 0000H after reset, and the TABnCCR3 register is cleared to 0000H.
This circuit detects the valid edges input to the TIBn0 to TIBn3, EVTBn, and TRGBn pins. No edge, rising edge,
falling edge, or both the rising and falling edges can be selected as the valid edge by using the TABnIOC1 and
TABnIOC2 registers.
This circuit controls the output of the TOBn0 to TOBn3 pins. The output controller is controlled by the
TABnIOC0 register.
This selector selects the count clock for the 16-bit counter. Eight types of internal clocks or an external event
can be selected as the count clock.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
User’s Manual U18279EJ3V0UD

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