UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 718
UPD70F3451GC-UBT-A
Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet
1.UPD70F3451GC-UBT-A.pdf
(1191 pages)
Specifications of UPD70F3451GC-UBT-A
Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
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A/D conversion twice consecutively on the same channel, and discard the first conversion result.
13.8 How to Read A/D Converter Characteristics Table
Table.
716
(9) Standby mode
(10) Variation of A/D conversion results
(11) A/D conversion result hysteresis characteristics
To obtain more accurate conversion results, lower the output impedance from the analog input source or execute
For details about the A/D converter characteristics table, see 12.7 How to Read A/D Converter Characteristics
Because the A/D converter 2 stops operating in the IDLE and STOP modes, conversion results are invalid, so
power consumption can be reduced. Operations are resumed after the IDLE and STOP modes are released,
but the A/D conversion results after the IDLE and STOP modes are released are invalid. When using the A/D
converter 2 after the IDLE and STOP modes are released, before setting the IDLE and STOP modes or
releasing the IDLE and STOP modes, set the AD2M0.AD2CE bit to 0 then set the AD2CE bit to 1 after
releasing the IDLE and STOP modes.
The results of the A/D conversion may vary depending on the fluctuation of the supply voltage, or may be
affected by noise.
averaging the A/D conversion results.
Successive comparison type A/D converters hold an analog input voltage in an internal sample & hold
capacitor and then perform A/D conversion. After the A/D conversion has finished, the analog input voltage
remains in the internal sample & hold capacitor. As a result, the following phenomena may occur if the output
impedance from the analog input source is too high.
• When the same channel is used for A/D conversions, if the voltage is higher or lower than the previous A/D
• When switching the analog input channel, hysteresis characteristics may appear where the conversion
conversion, then hysteresis characteristics may appear where the conversion result is affected by the
previous value. Even if the conversion were to be performed at the same potential, the results may thus
vary.
result is affected by the previous channel value. This is because one A/D converter is used for the A/D
conversions. Even if the conversion were to be performed at the same potential, the results may thus vary.
To reduce the variation, take counteractive measures with the program, such as by
CHAPTER 13 A/D CONVERTER 2
User’s Manual U18279EJ3V0UD
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