UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 64

no-image

UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
3.2.1
62
The program register set includes general-purpose registers and a program counter.
(1) General-purpose registers (r0 to r31)
(2) Program counter (PC)
Thirty-two general-purpose registers, r0 to r31, are available. Any of these registers can be used as a data
variable or address variable.
However, r0 and r30 are implicitly used by instructions, and care must be exercised when using these
registers. r0 is a register that always holds 0, and is used for operations using 0 and offset 0 addressing. r30
is used, by means of the SLD and SST instructions, as a base pointer for when memory is accessed. Also, r1,
r3 to r5, and r31 are implicitly used by the assembler and C compiler. Therefore, before using these registers,
their contents must be saved so that they are not lost. The contents must be restored to the registers after the
registers have been used. r2 may be used by the real-time OS. If the real-time OS does not use r2, it can be
used as a variable register.
This register holds the instruction address during program execution. The lower 26 bits of this register are
valid, and bits 31 to 26 are fixed to 0. If a carry occurs from bit 25 to 26, it is ignored.
Bit 0 is fixed to 0, and branching to an odd address cannot be performed.
Program register set
r0
r1
r2
r3
r4
r5
r6 to r29
r30
r31
Name
After reset: 00000000H
PC
31
Zero register
Assembler-reserved register
Address/data variable register (when r2 is not used by the real-time OS)
Stack pointer
Global pointer
Text pointer
Address/data variable registers
Element pointer
Link pointer
Fixed to 0
Usage
26 25
Table 3-1. General-Purpose Registers
CHAPTER 3 CPU FUNCTION
User’s Manual U18279EJ3V0UD
Always holds 0
Working register for generating 32-bit immediate data
Used to generate stack frame when function is called
Used to access global variable in data area
Register to indicate the start of the text area (where program
code is located)
Base pointer when memory is accessed
Used by compiler when calling function
Instruction address during execution
Operation
1 0
0

Related parts for UPD70F3451GC-UBT-A