UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1039

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
<R>
<R>
<R>
Note After a reset by RESET pin input or the power-on-clear circuit (POC), or after a forced reset by the on-
Cautions 1. If setting (occurrence of reset of set source) and clearing (occurrence of system reset or
chip debug function: 00H
After a reset due to a watchdog timer overflow: 10H
After a reset by the low-voltage detector (LVI): 01H
2. Even if reset masking was specified when a flag setting source occurred, the flag is set.
RESF
<1> A reset by RESET pin input or the power-on-clear circuit (POC), or a forced reset by
<2> A reset by WDT or LVI (that sets the RESF register)
<3> Writing 0 to the WDTRF or LVIRF bit by a bit manipulation or store instruction (that
After reset: 00H
writing 0 to the WDTRF or LVIRF bit) of the RESF register conflict, the priorities are as
follows.
(Reset masking does not affect setting the flag.)
the on-chip debug function (that clears the RESF register)
clears the RESF register)
WDTRF
LIVRF
0
1
0
1
0
Note
Read: No reset request, Write: Clear
Reset request
Read: No reset request, Write: Clear
Reset request
0
R/W
CHAPTER 22 RESET FUNCTIONS
Occurrence of reset signal from low-voltage detector (LVI)
Occurrence of reset signal from watchdog timer (WDT)
User’s Manual U18279EJ3V0UD
Address: FFFFF888H
0
WDTRF
0
0
0
LIVRF
1037

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