UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 398

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.6.7
bit is set to 1. Each time the valid edge input to the TIBna pin has been detected, the count value of the 16-bit counter
is stored in the TABnCCRa register, and the 16-bit counter is cleared to 0000H.
signal (INTTBnCCa) occurs.
detection” by using the TABnIOC1 register for the unused pins.
396
In the pulse width measurement mode, 16-bit timer/event counter AB starts counting when the TABnCTL0.TABnCE
The interval of the valid edge can be measured by reading the TABnCCRa register after a capture interrupt request
As shown in Figure 7-39, select either of the TIBn0 to TIBn3 pins as the capture trigger input pin. Specify “No edge
Remark
(external event
Pulse width measurement mode (TABnMD2 to TABnMD0 bits = 110)
trigger input)
trigger input)
trigger input)
trigger input)
count input)
EVTBn pin
TIBn0 pin
TIBn1 pin
TIBn2 pin
TIBn3 pin
(capture
(capture
(capture
(capture
n = 0, 1
a = 0 to 3
Internal count clock
Figure 7-38. Configuration in Pulse Width Measurement Mode
detector
detector
detector
detector
detector
Edge
Edge
Edge
Edge
Edge
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
selection
TABnCE
Count
clock
bit
User’s Manual U18279EJ3V0UD
TABnCCR0
(capture)
register
TABnCCR1
(capture)
register
TABnCCR2
(capture)
register
16-bit counter
TABnCCR3
(capture)
register
Clear
INTTBnOV signal
INTTBnCC0 signal
INTTBnCC1 signal
INTTBnCC2 signal
INTTBnCC3 signal