UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 301

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) TABn I/O control register 0 (TABnIOC0)
Note The output level of the timer output pins (TOBna and TOBnTb) specified by the TABnOLa bit is shown
Cautions 1. If the setting of the TABnIOC0 register is changed when TOBna and TOBnTb are set in the
The TABnIOC0 register is an 8-bit register that controls the timer output (TOBn0 to TOBn3, TOBnT1 to TOBnT3
pins).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
below.
2. Rewrite the TABnOLa and TABnOEa bits when the TABnCTL0.TABnCE bit = 0. (The same
3. If the TABnOLa bit is manipulated when the TABnCE and TABnOEa bits are 0, the output
4. To generate the TOBnTb pin output and the A/D conversion start trigger signal of A/D
TABnIOC0
a = 0 to 3
b = 1 to 3
n = 0, 1
output mode, the output of the pins change. Set the port in the input mode and make the
port go into a high-impedance state, noting changes in the pin status.
value can be written when the TABnCE bit = 1.) If rewriting was mistakenly performed,
clear (0) the TABnCE bit and then set the bits again.
level of the TOBna and TOBnTb pins changes.
converters 0 and 1 in the 6-phase PWM output mode, be sure to set the TOBnTb pin output
using the TABnIOC0 register. At this time, be sure to clear the TABnOL0 bit to 0 and set
the TABnOE0 bit to 1.
After reset: 00H
• When TABnOLa bit = 0
TOBna and TOBnTb
TABnOL3
TABnOEa
TABnOLa
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
1
0
1
0
7
16-bit counter
TABnCE bit
output pins
R/W
TABnOE3 TABnOL2 TABnOE2 TABnOL1 TABnOE1 TABnOL0 TABnOE0
Timer output disabled
• When TABnOLa bit = 0: Low level is output from the TOBna and TOBnTb
• When TABnOLa bit = 1: High level is output from the TOBna and TOBnTb
Timer output enabled (A pulse is output from the TOBna and TOBnTb
pins).
TOBna and TOBnTb pins start output at high level.
TOBna and TOBnTb pins start output at low level.
pins
pins
<6>
Address: TAB0IOC0 FFFFF5E2H, TAB1IOC0 FFFFF622H
User’s Manual U18279EJ3V0UD
5
TOBna, TOBnTb pin output level setting
TOBna, TOBnTb pin output setting
<4>
• When TABnOLa bit = 1
TOBna and TOBnTb
16-bit counter
3
TABnCE bit
output pins
<2>
Note
1
<0>
299