UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 299

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.4
(1) TABn control register 0 (TABnCTL0)
Note The TABnOPT0.TABnOVF bit and the 16-bit counter are reset simultaneously. Moreover, timer outputs
Cautions 1. Set the TABnCKS2 to TABnCKS0 bits when the TABnCE bit = 0.
Remark
Registers
The TABnCTL0 register is an 8-bit register that controls the operation of TABn.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
The same value can always be written to the TABnCTL0 register by software.
(TOBn0 to TOBn3 pins) are reset to the TABnIOC0 register set status at the same time as the 16-bit
counter is reset.
2. Be sure to set bits 3 to 6 to “0”.
f
XX
TABnCTL0
(n = 0, 1)
: Peripheral clock
When the value of the TABnCE bit is changed from 0 to 1, the TABnCKS2 to TABnCKS0 bits
can be set simultaneously.
After reset: 00H
TABnCKS2
TABnCE
TABnCE
<7>
0
1
0
0
0
0
1
1
1
1
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
R/W
TABnCKS1
TABn operation disabled (TABn reset asynchronously
TABn operation enabled.
6
0
0
0
1
1
0
0
1
1
Address: TAB0CTL0 FFFFF5E0H, TAB1CTL0 FFFFF620H
TABnCKS0
User’s Manual U18279EJ3V0UD
5
0
0
1
0
1
0
1
0
1
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
4
0
TABn operation control
/2
/4
/8
/16
/32
/64
/128
Internal count clock selection
3
0
TABnCKS2 TABnCKS1 TABnCKS0
2
Note
)
1
0
297

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