UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 322

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

320
Notes 1. Because the TABnCCR1 register was not rewritten, D
Remarks 1. D
CCR0 buffer
CCR1 buffer
CCR2 buffer
CCR3 buffer
INTTBnCC0
INTTBnCC1
INTTBnCC2
INTTBnCC3
TABnCCR0
TABnCCR1
TABnCCR2
TABnCCR3
pin output
pin output
pin output
pin output
counter
register
register
register
register
register
register
register
register
FFFFH
TOBn0
TOBn1
TOBn2
TOBn3
0000H
2. Because TABnCCR1 register has been written (D
3. Because TABnCCR1 register has been written (D
signal
signal
signal
signal
16-bit
2. The above timing chart illustrates the operation in the PWM output mode as an example.
upon a match between the value of the 16-bit timer and the value of the TABnCCR0 register (D
upon a match between the value of the 16-bit timer and the value of the TABnCCR0 register (D
D
D
D
01
11
21
31
TABnCE bit = 1
, D
, D
:
, D
0000H
0000H
0000H
0000H
02
12
32
, D
:
, D
03
33
D
: Set values of TABnCCR0 register
: Set values of TABnCCR3 register
21
D
D
D
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
Set values of TABnCCR1 register
Set value of TABnCCR2 register
31
01
11
D
31
D
D
D
D
D
01
11
21
31
11
Figure 7-5. Timing of Batch Write
User’s Manual U18279EJ3V0UD
D
Note 2
01
D
21
D
02
D
12
D
32
Note 1
Note 1
Note 1
Note 1
D
12
12
02
D
), data is transferred to the CCR1 buffer register
), data is transferred to the CCR1 buffer register
32
D
D
02
D
21
21
12
is not transferred.
D
21
D
12
D
D
D
D
02
12
32
32
Note 1
Note 1
Note 1
Note 1
D
02
D
21
D
D
03
Note 3
12
D
Same value write
32
D
03
D
D
33
D
12
21
D
D
D
D
D
03
12
21
33
12
01
12
).
).