UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 357

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(d) Conflict between trigger detection and match with CCR0 buffer register
If the trigger is detected immediately after the INTTBnCC0 signal is generated, the 16-bit counter is
cleared to 0000H and continues counting up. Therefore, the active period of the TOBnb pin is extended by
time from generation of the INTTBnCC0 signal to trigger detection.
Remark
If the trigger is detected immediately before the INTTBnCC0 signal is generated, the INTTBnCC0 signal is
not generated. The 16-bit counter is cleared to 0000H, the TOBnb pin is asserted, and the counter
continues counting. Consequently, the inactive period of the PWM waveform is shortened.
Remark
External trigger input
CCR0 buffer register
CCR0 buffer register
External trigger input
n = 0, 1
b = 1 to 3
n = 0, 1
b = 1 to 3
INTTBnCC0 signal
INTTBnCC0 signal
(TRGBn pin input)
(TRGBn pin input)
TOBnb pin output
TOBnb pin output
16-bit counter
16-bit counter
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
FFFF
FFFF
User’s Manual U18279EJ3V0UD
0000
0000
D
D
0
D
0
D
− 1
− 1
0
0
D
D
Shortened
0
0
Extended
0000
0000
0000
0001
355

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