UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 324

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

with the count clock, and the counter starts counting. At this time, the output of the TOBn0 pin is inverted. Additionally,
the set value of the TABnCCR0 register is transferred to the CCR0 buffer register.
cleared to 0000H, the output of the TOBn0 pin is inverted, and a compare match interrupt request signal
(INTTBnCC0) is generated.
322
TABnCTL0
TABnCTL1
When the TABnCE bit is set to 1, the value of the 16-bit counter is cleared from FFFFH to 0000H in synchronization
When the count value of the 16-bit counter matches the value of the CCR0 buffer register, the 16-bit counter is
The interval can be calculated by the following expression.
Interval = (Set value of TABnCCR0 register + 1) × Count clock cycle
Remark
(a) TABn control register 0 (TABnCTL0)
(b) TABn control register 1 (TABnCTL1)
Note The TABnEEE bit can be set to 1 only when timer output (TOBn0 to TOBn3) is used. However,
n = 0, 1
TABnCE
0/1
0
set the TABnCCR0 to TABnCCR3 registers to the same value.
TABnEST
Figure 7-8. Register Setting for Interval Timer Mode Operation (1/3)
0
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
TABnEEE
0/1
Note
0
0
User’s Manual U18279EJ3V0UD
0
0
0
TABnMD2 TABnMD1 TABnMD0
TABnCKS2 TABnCKS1 TABnCKS0
0
0/1
0
0/1
0
0/1
0, 0, 0:
Interval timer mode
0: Operate on count
1: Count with external
clock selected by
TABnCKS0 to TABnCKS2 bits
event count input signal
Select count clock
0: Stop counting
1: Enable counting