UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 492

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

490
TTnOPT0
TTmIOC2
(e) TMTm I/O control register 2 (TTmIOC2)
(f) TMTn option register 0 (TTnOPT0)
(g) TMTn counter read buffer register (TTnCNT)
(h) TMTn capture/compare registers 0 and 1 (TTnCCR0 and TTnCCR1)
The value of the 16-bit counter can be read by reading the TTnCNT register.
These registers function as capture registers or compare registers depending on the setting of the
TTmOPT0.TTmCCSa bit.
When the registers function as capture registers, they store the count value of the 16-bit counter when
the valid edge input to the TITma pin is detected.
When the registers function as compare registers and when D
INTTTEQCna signal is generated when the counter reaches (D
TOTm0 and TOTm1 pins are inverted.
Remark
0
0
V850E/IF3: n = 0, 1, m = 1, a = 0, 1
V850E/IG3: n = 0, 1, m = 0, 1, a = 0, 1
Figure 8-36. Register Setting in Free-Running Timer Mode (2/2)
0
0
CHAPTER 8 16-BIT TIMER/EVENT COUNTER T (TMT)
TTmCCS1
0/1
0
TTmCCS0
0/1
0
User’s Manual U18279EJ3V0UD
TTmEES1
0/1
0
TTmEES0 TTmETS1 TTmETS0
0/1
0
0
0
a
a
is set to the TTnCCRa register, the
+ 1), and the output signals of the
TTnOVF
0/1
0
Overflow flag
Specifies if TTmCCR0
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TTmCCR1
register functions as
capture or compare register
0: Compare register
1: Capture register
Select valid edge of
external event count
input (EVTTm pin)