UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1023

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

20.7 Multiple Interrupt Servicing Control
interrupted during servicing if there is an interrupt request signal with a higher priority level, and the higher priority
interrupt request signal is acknowledged and serviced first.
that interrupt request signal is held pending.
Thus, to execute multiple interrupts, it is necessary to set the interrupt enabled state (PSW.ID bit = 0) even in an
interrupt servicing routine.
exception servicing program, it is necessary to save EIPC and EIPSW.
Multiple interrupt servicing control is a process by which an interrupt request that is currently being serviced can be
If there is an interrupt request signal with a lower priority level than the interrupt request currently being serviced,
Multiple interrupt servicing control of maskable interrupts is executed when interrupts are enabled (PSW.ID bit = 0).
If maskable interrupts are enabled or a software exception is generated in a maskable interrupt or software
This is accomplished by the following procedure.
(1) Acknowledgment of maskable interrupt signals in servicing program
Service program of maskable interrupt or exception
• EIPC saved to memory or register
• EIPSW saved to memory or register
• EI instruction (interrupt acknowledgment enabled)
• DI instruction (interrupt acknowledgment disabled)
• Saved value restored to EIPSW
• Saved value restored to EIPC
• RETI instruction
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CHAPTER 20 INTERRUPT/EXCEPTION PROCESSING FUNCTION
User’s Manual U18279EJ3V0UD
← Maskable interrupt acknowledgment
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