UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 223

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.6.1
TAAnCCR0 register if the TAAnCTL0.TAAnCE bit is set to 1. A PWM waveform with a duty factor of 50% whose half
cycle is equal to the interval can be output from the TOAm0 pin.
transferred to the CCR1 buffer register, and when the count value of the 16-bit counter matches the value of the CCR1
buffer register, a compare match interrupt request signal (INTTAnCC1) is generated. In addition, a PWM waveform
with a duty factor of 50%, which is inverted when the INTTAmCC1 signal is generated, can be output from the TOAm1
pin.
In the interval timer mode, an interrupt request signal (INTTAnCC0) is generated at the interval set by the
The TAAnCCR1 register is not used in the interval timer mode. However, the set value of the TAAnCCR1 register is
The value of the TAAnCCR0 and TAAnCCR1 registers can be rewritten even while the timer is operating.
Remark
Remark
Interval timer mode (TAAnMD2 to TAAnMD0 bits = 000)
TAAnCCR0 register
INTTAnCC0 signal
Count clock
selection
TOAm0 pin output
V850E/IF3: n = 0 to 4, m = 2, 4
V850E/IG3: n = 0 to 4, m = 2 to 4
V850E/IF3: n = 0 to 4, m = 2, 4
V850E/IG3: n = 0 to 4, m = 2 to 4
16-bit counter
TAAnCE bit
FFFFH
0000H
TAAnCE bit
Figure 6-11. Basic Timing of Operation in Interval Timer Mode
CHAPTER 6 16-BIT TIMER/EVENT COUNTER AA (TAA)
Figure 6-10. Configuration of Interval Timer
Interval (D
D
User’s Manual U18279EJ3V0UD
0
0
+ 1) Interval (D
CCR0 buffer register
TAAnCCR0 register
16-bit counter
Clear
D
0
Match signal
0
+ 1) Interval (D
D
0
D
0
0
+ 1) Interval (D
controller
Output
INTTAnCC0 signal
D
0
0
+ 1)
TOAm0 pin
221