UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 186

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.4
5.4.1
frequency multiplied by 8, and clock-through mode.
5.4.2
the internal circuit after the lapse of the lockup time (frequency stabilization time) during which the phase is locked at a
specific frequency and oscillation is stabilized. In the V850E/IF3 and V850E/IG3, the lockup time after release of reset
is secured automatically.
5.4.3
generated.
184
The CPU and the operating clock of the peripheral macro can be switched between output of the oscillation
When PLL function is used: Input clock (f
Clock-through mode:
In the PLL mode, the oscillation frequency (f
In the PLL mode, the clock is input from the oscillator to the PLL. A clock at a stable frequency must be supplied to
Caution When a resonator of f
In the clock-through mode, a system clock (f
PLL Function
Overview
PLL mode
Clock-through mode
must be 3 ms (MAX.), the reset input (RESET active) width must be 2 ms (MIN.).
Input clock (f
X
= 8 MHz is used and if the oscillation stabilization time of that resonator
CHAPTER 5 CLOCK GENERATOR
X
X
) = 4 to 8 MHz, output clock (f
) = 4 to 8 MHz, output clock (f
User’s Manual U18279EJ3V0UD
X
) is multiplied by 8 with the PLL to generate a system clock (f
XX
) of the same frequency as the oscillation frequency (f
XX
XX
) = 32 to 64 MHz
) = 4 to 8 MHz
XX
).
X
) is

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