UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1044

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
<R>
23.3 Control Registers
1042
(1) Low-voltage detection register (LVIM)
The LVIM register is used to enable or disable low voltage detection, and to set the operation mode of the low-
voltage detector. The LVIM register is a special register. It can be written only by a combination of specific
sequences (see 3.4.8 Special registers).
This register can be read or written in 8-bit or 1-bit units. However, bit 0 is read-only.
Reset other than reset by the low-voltage detector (LVI) sets this register to 00H.
Cautions 1. After setting the LVION bit to 1, wait for 0.1 ms or more before checking the voltage
LVIM
After reset: 00H
2. The value of the LVIF flag is output as the output signals INTLVIL or INTLVIH when
3. If the LVION bit = 1 and LVIMD bit = 1, the low-voltage detector (LVI) cannot be
4. Be sure to set bits 2 to 6 to “0”.
LVION
LVION
LVIMD
LVIF
<7>
0
1
0
1
0
1
using the LVIF bit.
the LVION bit = 1 and LVIMD bit = 0.
stopped until a reset request other than that of by the LVI is generated.
Disable operation.
Enable operation.
Generate interrupt request signal INTLVIL when supply voltage < detection
voltage.
Generate interrupt request signal INTLVIH when supply voltage > detection
voltage.
Generate internal reset signal LVIRES when supply voltage < detection voltage.
When supply voltage > detection voltage, or when operation is disabled
Supply voltage < detection voltage
R/W
6
0
CHAPTER 23 LOW-VOLTAGE DETECTOR
Address: FFFFF890H
User’s Manual U18279EJ3V0UD
Selection of operation mode of low voltage detection
5
0
Low voltage detection operation enable or disable
Low voltage detection flag
4
0
3
0
2
0
LVIMD
<1>
LVIF
<0>

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