UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 303

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(5) TABn I/O control register 2 (TABnIOC2)
The TABnIOC2 register is an 8-bit register that controls the valid edge of the external event count input signal
(EVTBn pin) and external trigger input signal (TRGBn pin).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. Rewrite the TABnEES1, TABnEES0, TABnETS1, and TABnETS0 bits when the
TABnIOC2
(n = 0, 1)
2. The TABnEES1 and TABnEES0 bits are valid only when the TABnCTL1.TABnEEE bit = 1
3. The TABnETS1 and TABnETS0 bits are valid only in the external trigger pulse output
After reset: 00H
TABnCTL0.TABnCE bit = 0. (The same value can be written when the TABnCE bit = 1.)
If rewriting was mistakenly performed, clear the TABnCE bit to 0 and then set the bits
again.
or when the external event count mode (TABnCTL1.TABnMD2 to TABnCTL1.TABnMD0
bits = 001) has been set.
mode or one-shot pulse output mode.
TABnEES1
TABnETS1
0
0
1
1
0
0
1
1
7
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTER AB (TAB)
TABnEES0
TABnETS0
R/W
6
0
0
1
0
1
0
1
0
1
Address: TAB0IOC2 FFFFF5E4H, TAB1IOC2 FFFFF624H
External event count input signal (EVTBn pin) valid edge setting
User’s Manual U18279EJ3V0UD
No edge detection (external event count invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
No edge detection (external trigger invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
External trigger input signal (TRGBn pin) valid edge setting
5
0
4
0
TABnEES1 TABnEES0 TABnETS1 TABnETS0
3
2
1
0
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