UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 560

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

558
Notes 1. • V850E/IF3
2. For detecting the voltage of a comparator exceeding the reference voltage, set the rising edge input.
3. V850E/IG3 only
• V850E/IG3
For detecting the voltage of a comparator which has not attained the reference voltage, set the falling
edge input.
HZA0CTL0: TOB0OFF pin,
HZA1CTL0: TOB1OFF pin,
HZA2CTL0: ANI00/ANI05 pin,
HZA3CTL0: ANI10 to ANI12, ANI15 to ANI17 pins,
HZA3CTL1: ANI10 to ANI12, ANI15 to ANI17 pins
HZA0CTL0: TOB0OFF pin,
HZA1CTL0: TOB1OFF pin,
HZA2CTL0: ANI00/ANI05 pin,
HZA3CTL0: ANI10 to ANI12, ANI15 to ANI17 pins,
HZA3CTL1: ANI10 to ANI12, ANI15 to ANI17 pins
HZAyDCNn
• Rewrite the HZAyDCNn and HZAyDCPn bits when the HZAyDCEn bit is 0.
• For the edge specification of the INTP00, INTP02, INTP08, and INTP10 pins, see
• The edge of the external pins must be specified starting from the TOB0OFF,
• High-impedance output control is performed when the valid edge is input after the
20.4.2 (1) External interrupt rising edge specification register 0 (INTR0),
external interrupt falling edge specification register 0 (INTF0) and
(2) External interrupt rising edge specification register 1 (INTR1), external
interrupt falling edge specification register 1 (INTF1).
TOB1OFF, TOA2OFF, and TOA3OFF
pins other than the TOB0OFF, TOB1OFF, TOA2OFF, and TOA3OFF
must be specified. Otherwise, the undefined edge may be detected when the
edges of the TOB0OFF, TOB1OFF, TOA2OFF, and TOA3OFF
specified.
operation is enabled (by setting HZAyDCEn bit to 1). If the external pin
the active level when the operation is enabled, therefore, high-impedance output
control is not performed.
0
0
1
1
HZAyDCPn
0
1
0
1
CHAPTER 10 MOTOR CONTROL FUNCTION
No valid edge (setting the HZAyDCFn bit by external pin
input is prohibited).
Rising edge of the external pin
(abnormality is detected by rising edge input)
Falling edge of the external pin
(abnormality is detected by falling edge input)
Setting prohibited
User’s Manual U18279EJ3V0UD
External pin
HZA0CTL1: TOA2OFF pin,
HZA2CTL1: ANI00/ANI05 pin,
HZA0CTL1: TOA2OFF pin,
HZA1CTL1: TOA3OFF pin,
HZA2CTL1: ANI00/ANI05 pin,
Note 3
Note 1
pins. Then the edge of the external
input edge specification
Note 1
Note 1
input is valid
input is valid
Note 3
Note 2
Note 2
pins are
.
.
Note 3
Note 1
pins
Note 1
is at
(2/3)