UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 1070

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

26.2.4 Cautions
1068
(1) Handling of device that was used for debugging
(2) When breaks cannot be executed
(3) When pseudo real-time RAM monitor (RRM) function and DMM function do not operate
(4) Standby release with pseudo RRM and DMM functions enabled
(5) Writing to peripheral I/O registers that requires a specific sequence, using DMM function
(6) Flash self programming
• Standby mode is entered while standby release by a maskable interrupt is prohibited
• Mode for communication between MINICUBE2 and the V850E/IF3, V850E/IG3 is UARTA0, and the
• Interrupts are disabled (DI)
• Interrupts issued for the serial interface, which is used for communication between MINICUBE2 and the
• Standby mode is entered while standby release by a maskable interrupt is prohibited
• Mode for communication between MINICUBE2 and the V850E/IF3, V850E/IG3 is UARTA0, and the
• Mode for communication between MINICUBE2 and the V850E/IF3, V850E/IG3 is UARTA0, and a clock
• Mode for communication between MINICUBE2 and the V850E/IF3, V850E/IG3 is CSIB0
• Mode for communication between MINICUBE2 and the V850E/IF3, V850E/IG3 is UARTA0, and the
• Interrupts are disabled (DI)
• Interrupts issued for the serial interface, which is used for communication between MINICUBE2 and the
Do not mount a device that was used for debugging on a mass-produced product, because the flash memory
was rewritten during debugging and the number of rewrites of the flash memory cannot be guaranteed.
Moreover, do not embed the debug monitor program into mass-produced products.
Forced breaks cannot be executed if one of the following conditions is satisfied.
The pseudo RRM function and DMM function do not operate if one of the following conditions is satisfied.
The standby mode is released by the pseudo RRM function and DMM function if one of the following
conditions is satisfied.
Peripheral I/O registers that requires a specific sequence cannot be written with the DMM function.
If a space where the debug monitor program is allocated is rewritten by flash self programming, the debugger
can no longer operate normally.
peripheral clock has not stopped.
V850E/IF3, V850E/IG3, are masked
peripheral clock has been stopped
V850E/IF3, V850E/IG3, are masked
peripheral clock has been stopped
different from the one specified in the debugger is used for communication
CHAPTER 26 ON-CHIP DEBUG FUNCTION
User’s Manual U18279EJ3V0UD