UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 576

• Manufacturer Part Number: UPD70F3451GC-UBT-A
• Description: MCU 32BIT 128KB FLASH 80LQFP
• Manufacturer: Renesas Electronics America
• Series: V850E/Ix3r

Specifications of UPD70F3451GC-UBT-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 10x12b, 4x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.4.3 Interrupt culling function
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• The interrupts to be culled are INTTBnCC0 (crest interrupt) and INTTBnOV (valley interrupt).
• The TABnOPT1.TABnICE bit is used to enable output of the INTTBnCC0 interrupt and specify the count signal for
• The TABnOPT1.TABnIOE bit is used to enable output of the INTTBnOV interrupt and specify the count signal for
• The TABnOPT1.TABnID4 to TABnOPT1.TABnID0 bits are used to specify the number of interrupts to be culled,
• The TABnOPT2.TABnRDE bit is used to specify whether transfer is to be culled or not.
• The TABnOPT0.TABnCMS bit is used to specify whether the registers with a transfer function are batch rewritten
interrupt culling.
interrupt culling.
specified for the count signals for interrupt culling.
The interrupts are masked for the specified number of culling counts and an interrupt occurs at the next interrupt
timing.
If it is specified that transfer is to be culled, transfer is executed at the same timing as the interrupt output after
culling. If it is specified that transfer is not to be culled, transfer is executed at the transfer timing after the
TABnCCR1 register has been written.
or anytime rewritten.
The values of the registers are updated in synchronization with transferring when the TABnCMS bit is 0. When
the TABnCMS bit is 1, the values of the registers are immediately updated when a new value is written to the
registers.
Transfer is performed from the TABnCCRm register to the CCRm buffer register in synchronization with interrupt
culling timing.
Cautions 1. When using the interrupt culling function in the batch rewrite mode (transfer mode),
2. An interrupt is generated at the timing after culling.
execute the function in the intermittent batch rewrite mode (transfer culling mode).
CHAPTER 10 MOTOR CONTROL FUNCTION
User’s Manual U18279EJ3V0UD