UPD70F3451GC-UBT-A Renesas Electronics America, UPD70F3451GC-UBT-A Datasheet - Page 71

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UPD70F3451GC-UBT-A

Manufacturer Part Number
UPD70F3451GC-UBT-A
Description
MCU 32BIT 128KB FLASH 80LQFP
Manufacturer
Renesas Electronics America
Series
V850E/Ix3r
Datasheet

Specifications of UPD70F3451GC-UBT-A

Core Processor
RISC
Core Size
32-Bit
Speed
64MHz
Connectivity
CSI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 10x12b, 4x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3451GC-UBT-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
3.3 Operating Modes
3.3.1
FLMD0 and FLMD1 pins.
3.3.2
programmer in the flash memory programming mode; however, in the self-programming mode, input a high level via
an external circuit.
change then during operation.
The V850E/IF3 and V850E/IG3 have the following operating modes. Mode specification is carried out using the
(1) Normal operation mode
(2) Flash memory programming mode
The operating mode is specified according to the status (input level) of the FLMD0 and FLMD1 pins.
In the normal operating mode, input a low level to the FLMD0 pin after reset.
When the flash memory programmer is connected, a high level is input to the FLMD0 pin by the flash memory
Other than in the self-programming mode, fix the specifications of these pins in the application system, and do not
Remark
FLMD1
H
×
L
In this mode, execution branches to the reset entry address in the internal ROM and instruction processing is
started when system reset is released.
If this mode is specified, a program can be written to the internal flash memory by the flash memory
programmer.
Operating modes
Operating mode specification
L: Low-level input
H: High-level input
FLMD0
H
H
L
Normal operation mode
Flash memory programming mode
Setting prohibited
Operating Mode
CHAPTER 3 CPU FUNCTION
User’s Manual U18279EJ3V0UD
Internal ROM area is allocated from address 000000H.
Remarks
69

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