TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 131
TMP92xy26AXBG
Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY26AXBG.pdf
(768 pages)
Specifications of TMP92xy26AXBG
Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
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INT4
SCLK0 output
(on bit basis)
(on bit basis)
Output latch
P9FC write
Function
P9 read
Direction
Function
Reset
P9FCwrite
control
P9CRwrite
P9 read
P9 write
control
control
Reset
IIMC<I4EDGE>
S
edge-ditection
Rising/Falling
TSICR0<PXEN>
TSICR0<TSI7>
A
B
Selector
Selector
Figure 3.7.16 Port 96,97
SCLK0 input
TSICR1<DBC7>
CTS
Figure 3.7.15 P91, 92
RXD0 input
S
S
<PYEN>
Selector
0
92CF26A-129
A
B
TSICR0<TWIEN , TSI7>
input
S
TSICR0<PXEN>
TSICR0<TSI7>
A
B
De-bounce
Circuit
AVCC
Pull-down resistor
typ.50k Ω
Switch for TSI
typ.10 Ω
P96 (INT4,PX)
P97 (PY)
P91(RXD0)
P92(SCLK0,
Only for P96
CTS )
TMP92CF26A
0
2009-06-25
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